Online training course
The course is taught in Spanish or English
It will not leave you indifferent
This course is focused on the methodology for the development and verification of programmable logic in FPGAs and SoCs using VHDL, following the safety standards required in mission critical projects.
Its objective is to present methodologies, tools and good design practices to successfully address FPGA verification.
It includes the realization of practical verification cases where the certification evidences required by the security standards will be generated.
The course is oriented towards people with notions in the development of projects under security standards coming from the software field or with previous experience in the use of VHDL.
The attendees will receive the course slides in pdf format and the different case studies solved.
The Trainer
Electronics and Telecommunications Engineer and Master in Robotics, with twenty years of experience in embedded systems. He combines experience in hardware and software development with critical systems certification.
Agenda
- Planning
- Requirements Capture
- Detailed Design
- Requirements Capture
- Detailed Design
- Implementation
- Verification & Validation
- RTL versus behavioral code
- Good coding practices & coding standards
- Numeric libraries
- SEU Mitigation
- Fault-tolerant systems
- Secure your desing
- Basics of regression testing
- HDL Simulation
- Cross-clock domain analysis
- Static timing analysis
- Netlist simulation
- Hardware testing
- Functional coverage
- Assertions
- Constrained random verification
- UVVM
- VUnit
- Design tools and verification tools
- Tool qualification versus tool assessment
- Creation of a demo project
- Python for VHDL testing
- Installing 3rd party libraries
- Libraries for data analysis
- Regression testing
- Generating test data
- Synthesis and implementation
- Back annotated testing
